Complete the table given when each of the given FALCON-A instruction is executing on the Falcon –A Processor. All numbers are in the decimal number system, unless noted otherwise.

Instruction RTL equivalent Address Bus<15.0> Data Bus <15.0> MRead MWrite
load r6, [r5+15]
addi r3, r4, 26
jump [45]
store r1,[ r3+17]
sub r2, r3, r4
shiftr r2, r6, 4
mov r3, r2
jz r4, [-30]





Assumptions:
For this particular example we will assume that all memory contents are properly aligned, i.e. memory addresses start at address divisible by 2. = C348h



This table contains a partial memory map showing the addresses and the corresponding data values.



Memory Address Memory Content Memory Address Memory Content
0020h D2h C340h 51h
0021h 96h C341h CAh
0022h 49h C342h A5h
0023h 2Fh C343h D5h
………….. ………….. C344h E2h
C300h 44h ………….. …………..
C301h 23h 1240h 07h
C302h E3h 1241h 85h
C303h D5h 1242h E5h
………….. ………….. 1243h 3Dh

The next table shows the register map showing the contents of all the CPU registers. Another
important thing to note is that memory storage is big-Endian.


Register Name Content
R[0] A54Bh
R[1] 4CB8h
R[2] 492Fh
R[3] C2EFh
R[4] 2301h
R[5] 1234h
R[6] 0020h
R[7] 2D7Fh

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